Product Summary
The SAF-C165UTAH-LF-V1.3 is a new low cost member of the Infineon Communication Controller family using low power CMOS technology. The device combines the successful Infineon C166 16-bit full-static core with a full-speed Universal Serial Bus (USB) interface, four independent HDLC controllers, IOM-2 interface and 3-kbyte of Dual-Port on-chip RAM to a USB type Intelligent Terminal Adapter with HDLC support. The SAF-C165UTAH-LF-V1.3 adresses all high feature ISDN TA, Intelligent NT or SOHO PBX designs, offering up to 18 MIPS along with legacy peripherals such as USART, SCI and Timers. The USB device core has a built-in DMA, which provides maximum flexibility and performance. Off-loading the CPU in such a manner allows the user to implement value add software features enabling product differentiation.
Parametrics
Absolute maximum ratings:(1)Storage temperature (TST): -65 to +150 °C; (2)Voltage on VDD pins with respect to ground (VSS): -0.5 to + 4.0 V; (3)Voltage on any pin with respect to ground (VSS) (except VDD, VSS, XTAL and USB pins): -0.5 to 5.5 V; (4)Absolute maximum total I/O current: 250 mA; (5)Absolute maximum current on any pin, sink or source: 10 mA.
Features
Features:(1)Full-static core up to 18 MIPS (@36 MHz); (2)Peripheral Event Controller (PEC) for 8 independent DMA channels; (3)16 Dynamically Programmable Priority-Level Interrupt System; (4)Eight External Interrupts; (5)USB Specification 1.1 Compliant; (6)12 Mbit/s Full-Speed Mode; (7)7SW-configurable Endpoints, in addition to the bi-directional Control Endpoint 0; (8)Four Independent Full-Duplex HDLC Controllers; (9)IOM-2/PCM interface supporting TE, LT and PCM mode; (10)On-Chip PLL for CPU and USB clock generation; (11)Single and variable crystal clock input frequency (using USB 8 MHz only); (12)Bootstrap Loader support via USART interface; (13)On-Chip Debug Support (OCDS); (14)JTAG Boundary Scan Test support according to IEEE 1149.1; (15)3.3 V single supply voltage; (16)5 V (TTL-) tolerant I/Os; (17)C165UTAH is available in 144-Pin P-TQFP package.
Diagrams
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